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| ICM7213 August 1997 One Second/One Minute Timebase Generator Description The ICM7213 is a fully integrated micropower oscillator and frequency divider with four buffered outputs suitable for interfacing with most logic families. The power supply may be either a two battery stack (Ni-cad, alkaline, etc.) or a regular power supply greater than 2V. Depending upon the state of the WIDTH, INHIBIT, and TEST inputs, using a 4.194304MHz crystal will produce a variety of output frequencies including 2048Hz, 1024Hz, 34.133Hz, 16Hz, 1Hz, and 1/60Hz (plus composites). The ICM7213 utilizes a very high speed low power metal gate CMOS technology which uses 6.4V zeners between the drains and sources of each transistor and also across the supply terminals. Consequently, the ICM7213 is limited to a 6V maximum VSUPPLY , although a simple dropping network can be used to extend the VSUPPLY range well above 6V (See Figure 9). Features * Guaranteed 2V Operation * Very Low Current Consumption (Typ) . . . . 100A at 3V * All Outputs TTL Compatible * On Chip Oscillator Feedback Resistor * Oscillator Requires Only 3 External components: Fixed Capacitor, Trim Capacitor, and A Quartz Crystal * Output Inhibit Function * 4 Simultaneous Outputs: One Pulse/s, One Pulse/Min, 16Hz and Composite 1024 + 16 + 2Hz Outputs * Test Speed-Up Provides Other Frequency Outputs Ordering Information PART NUMBER ICM7213IPD TEMP. RANGE (oC) -25 to 85 PACKAGE 14 Ld PDIP PKG. NO. E14.3 Pinout ICM7213 (PDIP) TOP VIEW WIDTH 1 OUT 3 2 INHIBIT 3 VSS 4 OSC OUT 5 OSC IN 6 N/C 7 14 OUT 4 13 OUT 2 12 OUT 1 11 TEST 10 VDD 9 N/C 8 N/C CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 File Number 3165.1 9-9 ICM7213 Functional Block Diagram (4,194,304Hz) OSC IN 6 OSCILLATOR (8192Hz) (1024Hz) (64Hz) (16Hz) (4Hz) /29 RF /23 /24 /22 /22 5 OSC OUT n (1/60Hz) (1/2Hz) (1Hz) (2Hz) (5 x 3 x 2) / /2 /2 /2 n 14 OUT 4 n n 2 10 VDD OUT 3 n WIDTH 1 4 VSS 3 INHIBIT OR RESET 11 TEST 13 OUT 2 n 12 OUT 1 9-10 ICM7213 Absolute Maximum Ratings Supply Voltage (VDD - VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Output Current (Any Output) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA All Input and Oscillator Voltages. . . . . . . . VSS - 0.3V to VDD + 0.3V All Output Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to 6V Thermal Information Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER Supply Current, IDD VDD - VSS = 3.0V, fOSC = 4.194304MHz, Test Circuit, TA = 25oC, Unless Otherwise Specified TEST CONDITIONS -20oC to 85oC Any output, VOUT = 6V Any output, IOLK = 2.5mA Inhibit terminal connected to VDD Test point terminal connected to VDD Width terminal connected to VDD VDD = 2V 2V < VDD < 4V VDD = 2V MIN 2 100 1 TYP 100 120 10 10 10 1.0 0.1 0.2 MAX 140 4 10 200 40 40 40 10 UNIT A V A A A A S MHz ppm s s Guaranteed Operating Supply Voltage Range (VDD - VSS), VSUPPLY Output Leakage Current, IOLK Output Sat. Resistance, ROUT Inhibit Input Current, II Test Point Input Current, ITP Width Input Current, IW Oscillator Transconductance, gM Oscillator Frequency Range (Note 1), fOSC Oscillator Stability, fSTAB Oscillator Start Time, tS NOTE: 1. The ICM7213 uses dynamic dividers for high frequency division. As with any dynamic system, information is stored on very small nodal capacitances instead of latches (static system), therefore there is a lower frequency of operation. Dynamic dividers are used to improve the high frequency performance while at the same time significantly decreasing power consumption. At low VSUPPLY , operation at less than 1MHz is possible. Output Definitions (NOTE 1) INPUT STATES TEST L L L L H H H H NOTE: 1. When TEST and RESET are connected to ground, or left open, all outputs except for OUT 3 and OUT 4 have a 50% duty cycle. INHIBIT L L H H L L H H WIDTH L H L H L H L H PIN 12 OUT 1 16Hz / 218 16Hz / 218 218 218 16Hz / ON ON ON ON PIN 13 OUT 2 PIN 2 OUT 3 PIN 14 OUT 4 1/60Hz, 1s / (224 x 3 x 5) 1/ 60Hz, 125ms 1024 + 16 + 2Hz (/ 212 / 218 / 221) Composite 1Hz, 7.8ms / 222 1024 + 16 + 2Hz (/ 212 / 218 / 221) Composite 1Hz, 7.8ms / 222 16Hz / / / 218) Composite 4096 + 1024Hz (/ 210 / 212) Composite 1024 + 16Hz (/ 212 1024 + 16Hz (/ 212 218) Composite 4096 + 1024Hz (/ 210 / 212) Composite 1024Hz / 212 1024Hz / 212 OFF OFF 2048Hz / 211 OFF See Waveforms 34.133Hz, 50% DC / (213 x 5 x 3) 34.133Hz, 50% DC / (213 x 5 x 3) OFF OFF 2048Hz / 211 ON ON 9-11 ICM7213 Timing Waveforms 16Hz OUT 2 2Hz 1024Hz FIGURE 1. OUTPUT WAVEFORM INHIBIT OUT 3 CASE 1 OUT4 <7.8ms <7.8ms OUT 4 OUT 3 CASE 3 (EFFECT OF WIDTH ON OUT 4) OUT 4 tICS WIDTH <7.8ms 0.75s to 1.0s 59.75s to 60s <125ms CASE 2 (PULSE 3 COINCIDENT WITH INHIBIT) OUT 3 OUT 3 CASE 4 (EFFECT OF WIDTH ON OUT 4) OUT 4 1s WIDTH FIGURE 2. EFFECT OF THE INHIBIT (TEST CONNECTED TO VSS OR LEFT OPEN) Typical Performance Curves 130 VSUPPLY = 3V FOSC = 4.19MHz 110 SUPPLY CURRENT, IDD (A) 120 SUPPLY CURRENT (A) CIN = COUT = 30pF 250 300 TA = 25oC fOSC = 4.194304 MHz 200 100 150 CIN = COUT = 30pF 90 100 80 50 CIN = COUT = 10pF 0 -20 0 20 40 TEMPERATURE (oC) 60 80 2.0 3.0 4.0 5.0 SUPPLY VOLTAGE VDD - VSS (V) 70 -40 FIGURE 3. SUPPLY CURRENT AS A FUNCTION OF TEMPERATURE FIGURE 4. SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE 9-12 ICM7213 Typical Performance Curves 30 OSCILLATOR FREQUENCY DEVIATION, f/f IN ppm TA = 25oC 25 OUTPUT CURRENT - mA VSUPPLY = 5V 20 (Continued) +1.5 VDD - VSS = 3V +1.0 CIN , COUT AND QUARTZ CRYSTAL MAINTAINED AT 25oC fOSC = 4.19MHz +0.5 15 VSUPPLY = 3V 0.0 10 VSUPPLY = 2V -0.5 5 -1.0 -1.5 -40 0 0 0.1 0.2 0.3 0.4 0.5 0.6 OUTPUT SATURATION VOLTAGE (ANY OUTPUT) (V) -20 0 20 40 60 80 TEMPERATURE (oC) FIGURE 5. OUTPUT CURRENT AS A FUNCTION OF OUTPUT SATURATION VOLTAGE FIGURE 6. OSCILLATOR STABILITY AS A FUNCTION OF DEVICE TEMPERATURE +3 OSCILLATOR FREQUENCY DEVIATION, f/f IN ppm TA = 25oC +2 fOSC = 4.194304MHz 6 5 +1 VOLTAGE SUPPLY CIN = COUT = 30pF CIN = COUT = 10pF -2 4 0 3 -1 2 OPERATING WINDOW 1 -3 2.0 3.0 4.0 5.0 0 10kHz 100kHz 1MHz 10MHz SUPPLY VOLTAGE VDD - VSS (V) FIGURE 7. OSCILLATOR STABILITY AS A FUNCTION OF SUPPLY VOLTAGE FIGURE 8. WINDOW OF CORRECT OPERATION Test Circuit N.O. CRYSTAL PARAMETER f = 4.194304MHz RS = 35 (PARALLEL RESONANT) CM = 17mpF CO = 2.5pF WIDTH 1 2 14 13 12 ICM7213 11 10 IDD 9 8 N.O. T.P. INHIBIT N.O. 3 4 5 6 7 + VSUPPLY - 30pF 30pF 9-13 ICM7213 Detailed Description Supply Voltage Considerations The ICM7213 may be used to provide various precision outputs with frequencies from 2048Hz to 1/60Hz using a 4.194304MHz quartz oscillator, and other output frequencies may be obtained using other quartz crystal frequencies. Since the ICM7213 uses dynamic high frequency dividers for the initial frequency division there are limitations on the VSUPPLY range depending on the oscillator frequency. If, for example, a low frequency quartz crystal is selected, the VSUPPLY should be selected in the center of the operating window, or approximately 1.7V. The VSUPPLY to the ICM7213 may be derived from a high voltage supply by using a simple resistor divider (if power is of no concern), by using a series resistor for minimum current consumption, or by means of a regulator. Outputs Pull up resistors will generally be required to interface with other logic families. These resistors must be connected between the various outputs and the positive power supply. Oscillator Considerations The oscillator consists of a CMOS inverter and a feedback resistor whose value is dependent on the voltage at the oscillator input and output terminals and the VSUPPLY . Oscillator stabilities of approximately 0.1ppm per 0.1V variation are achievable with a nominal VSUPPLY of 5V and a single voltage dropping resistor. The crystal specifications are shown in the Test Circuit. It is recommended that the crystal load capacitance (CL) be no greater than 22pF for a crystal having a series resistance equal to or less than 75, otherwise the output amplitude of the oscillator may be too low to drive the divider reliably. It a very high quality oscillator is desired, it is recommended that a quartz crystal be used having a tight tuning tolerance 10ppm, a low series resistance (less than 25), a low motional capacitance of 5mpF and a load capacitance of 20pF. The fixed capacitor CIN should be 30pF and the oscillator tuning capacitor should range between approximately 16pF and 60pF. Use of a high quality crystal will result in typical stabilities of 0.05ppm per 0.1V change of VSUPPLY . Control Inputs The TEST input inhibits the 218 output and applies the 29 output to the 221 divider, thereby permitting a speedup of the testing of the / 60 section by a factor of 2048 times. This also results in alternative output frequencies (see table). The WIDTH input may be used to change the pulse width of OUT 4 from 125ms to 1s, or to change the state of OUT 4 fromIntersil OFF during INHIBIT. All ON to semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products 1 and 2 for output Intersil Corporation effect of See Figures are sold by description only.waveforms and reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, control inputs. the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com VS + EXAMPLE: R1 f = 4.2MHz 8V V 12V (10 NOMINAL) I1 100A I2 1mA R2 3k R2 R1 6.8k I2 VSS CBYPASS 0.01F I1 VDD ICM 7213 VS - FIGURE 9A. EXAMPLE: VS + fOSC = 4.2MHz 8V V 12V (10 NOMINAL) R3 I1 100A R3 = (10 - 3) I1 10 - 4 k 68k VDD ICM 7213 VSS CBYPASS 0.01F VS - FIGURE 9B. FIGURE 9. BIASING SCHEMES WITH HIGH VOLTAGE SUPPLIES 9-14 |
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